Custom IC Layout and Verification

Our high-speed, high-resolution, low-noise circuits require the finest care in custom layout consistent with the subtleties of deep sub-micron processes. Alpine is experienced at creating the  most compact, symmetrical, and robust layout possible in numerous process technologies and tool flows.  We rely heavily on automation and scripting for consistency and speed and we a experienced on the industry leading tools such as Cadence and Mentor for both front-end schematic capture and simulation through back-end layout and verification.

Alpine will work with your foundry of choice to implement process layout rules for all layout DRC, antenna, and LVS verification, or we can assist in you in selecting a process compatible with your system goals and budget.